Hacklet 28 – Programmable Logic Hacks

January 2, 2015 by Adam Fabio 21 Comments

FPGAs, CPLDs, PALs, and GALs, Oh My! This week’s Hacklet focuses on some of the best Programmable Logic projects on Hackaday.io! Programmable logic devices tend to have a steep learning curve. Not only is a new hacker learning complex parts, but there are entire new languages to learn – like VHDL or Verilog. Taking the plunge and jumping in to programmable logic is well worth it though. High-speed projects which would be impossible with microcontrollers are suddenly within reach!

A great example of this is [Tom McLeod’s] Cheap FPGA-based HDMI Experimenting Board. [Tom’s] goal was to create a board which could output 720p video via HDMI at a reasonable frame rate. He’s using a Xilinx Spartan 6 chip to do it, along with a handful of support components. The images will be stored on an SD card. [Tom] is hoping to do some video with the setup as well, but he has yet to see if the chip will be fast enough to handle video decoding while generating the HDMI data stream. [Tom] has been quiet on this project for a few months – so we’re hoping that either he will see this post and send an update, or that someone will pick up his source files and continue the project!

Next up is our own [technolomaniac] with his Arduino-Compatible FPGA Shield. Starting out with FPGAs can be difficult. [Technolomaniac] has made it a bit easier with this shield. Originally started as a project on .io and now available in The Hackaday Store, the shield features a Xilinx Spartan 6 FPGA. [Technolomaniac] made power and interfacing easy by including regulators and level shifters to keep the sensitive FPGA happy. Not sure where to start? Check out [Mike Szczys’] Spartan-6 FPGA Hello World! [Mike] takes us from installing Xilinx’s free tool chain to getting a “hello world” led blinker running!

Still interested in learning about Programmable Logic, but not sure where to go? Check out [Bruce Land’s] Teaching FPGA parallel computing. Actually, check out everything [Bruce] has done on Hackaday.io – the man is a living legend, and a wealth of information on electronics and embedded systems. Being a professor of engineering at New York’s Cornell University doesn’t hurt either! In Teaching FPGA parallel computing, [Bruce] links to Cornell’s ECE 5760 class, which he instructs. The class uses an Altera/Terasic DE2 FPGA board to demonstrate parallel computing using programmable logic devices. Note that [Bruce] teaches this class using Verilog, so all you seasoned VHDL folks still can learn something new!

Finally, we have [Michael A. Morris] with Chameleon. Chameleon is an Arduino compatible FPGA board with a Xilinx Spartan 3A FPGA on-board. [Michael] designed Chameleon for two major purposes: soft-core processors, and intelligent serial communications interface. On the processor side Chameleon really shines. [Michael] has implemented a 6502 core in his design. This means that it would be right at home as the core of a retrocomputing project. [Michael] is still hard at work on Chameleon, he’s recently gotten fig-FORTH 1.0 running! Nice work [Michael]!

Want more programmable logic goodness? Check out our Programmable Logic List!

That about wraps things up for this episode of The Hacklet! As always, see you next week. Same hack time, same hack channel, bringing you the best of Hackaday.io!

Parallax Propeller 1 Goes Open Source

August 7, 2014 by Adam Fabio 60 Comments

OpenPropellerProject OpenSourceProp1Banner

Parallax has embraced open source hardware by releasing the source code to its Propeller 1 processor (P8X32A). Designed by [Chip Gracey] and released in 2006, the 32-bit octal core Propeller has built up a loyal fan base. Many of those fans have created development tools for the Propeller, from libraries to language ports. [Ken, Chip], and the entire Parallax team have decided to pay it forward by releasing the entire source to the Propeller.

The source code is in Verilog and released under GNU General Public License v3.0. Parallax has done much more than drop 8-year-old files out in the wild. All the configuration files necessary to implement the design on an Altera Cyclone IV using either of two different target boards have also been included. The DE0-Nano is the low-cost option. The Altera DE2-115 dev board is more expensive, but it also can run the upcoming Propeller 2 design.

The release also includes sources for the mask ROM used for booting, running cogs, and the SPIN interpreter. [Chip] originally released this code in 2008. The files contain references to PNut, the Propeller’s original code name.

We’re excited to see Parallax taking this step, and can’t wait to see what sort of modifications the community comes up with. Not an Altera fan? No problem – just grab the source code, your favorite FPGA tools, and go for it! Starved for memory? Just add some more. 8 cogs not enough? Bump it up to 16. The only limits are the your imagination and the resources of your target device.

Interested in hacking on a real Propeller? If you’re in Las Vegas, you’re in luck. A Propeller is included on each of the nearly 14,000 badges going to DEFCON 22 attendees. While you’re there, keep an eye out for Mike and The Hackaday Hat!

Programmable Logic II – CPL

June 25, 2014 by Bil Herd 66 Comments

There is a wide assortment of cheap development (dev) boards for Complex Programmable Logic Devices (CPLD), the smaller cousin of the Field Programmable Logic Array (FPLA)

Using an inexpensive board and the development software that’s free to download from the major programmable companies such as Xilinx and Altera, the only additional thing needed is a programmer module. Cheap ones are available on Ebay but I am hoping that someone takes the time to teach an ARM/Arduino to step in as a programmer.

I have a small collection of dev boards including some Ebay specials and also designs I did a few years ago to choose from. For today I am grabbing a newer board that has not been fully checked out yet; an Altera Max V device. I have stuffed the CPLD, the clock oscillator, some LED’s and part of the onboard power supply along with the JTAG header needed to program the CPLD and that’s about it.

Herdware CPLD 5M570ZT dedicated PCB with SRAM.

CPLD Schematic showing an Altera CPLD 5M570T144

Continue reading “Programmable Logic II – CPL” →

HDMI Color Processing Board Used As An FPGA Dev Board To Mine Bitcoins

May 8, 2013 by Mike Szczys 73 Comments

fpga-eeColor-bitcoin-mining

The blue board seen above is the guts of a product called the eeColor Color3. It was designed to act as a pass-through between your television and HDMI source device. It boasts the ability to adjust the color saturation to suit any viewing conditions. But [Taylor Killian] could care less about what the thing was made for, he tore it open and used the FPGA inside for his own purposes.

The obvious problem with this compared to a proper dev board is that the pins are not all broken out in a user-friendly way. But he got his hands on it for free after a mail-in-rebate (you might find one online for less than $10 if you’re lucky) and it’s got an Altera Cyclone IV chip with 30k (EP4CE30F23C6N) gates in it so he’s not complaining. The first project he took on with his new toy was to load up an open source Bitcoin mining program. The image above shows it grinding away at 15 megahashes per second while consuming only 2.5 watts. Not bad. Now he just needs to make a modular rack to hold a mining farm.

Dabbling With CPLD Generated VGA Signals

May 5, 2011 by Mike Szczys 13 Comments

It seems like all the cool kids are leaving the 8-bit hobby microcontrollers in the parts bin and playing with more advanced parts like Complex Programmable Logic Devices. [Chris] is no exception to the trend, and set out to generate his own VGA signal using one of the beefy semiconductors.

It seems that he’s using the acronyms CPDL and FPGA interchangeable in his post but according to the parts list this setup uses an Altera EPM7128SLC84-7N CPLD. In order to generate the VGA signal he needed a way to convert the digital signals from the chip into the analog values called for in the video standard. He chose to build a Digital Analog Converter for the RGB color values using a resistor network which he calculated using PSpice. The other piece in the puzzle is a 25.175 MHz oscillator to clock the CPLD. As you can see after the break, his wire-wrapped prototype works exactly as designed. The example code generates the rainbow bars seen above, or a bouncing box demo reminiscent of a DVD player screen saver.

Want to know more about programming CPLDs? We did a tutorial on the subject a while back.

Continue reading “Dabbling With CPLD Generated VGA Signals” →

Sequencer Built On A Cycle II FPGA Board

April 8, 2011 by Mike Szczys 7 Comments

[Matt’s] finishing up his computer science degree. As part of a class assignment he programmed his own sequencer which runs on a Cyclone-II FPGA development board. We’ve embedded a video below the fold that shows you what it can do. The buttons and LEDs offered on the board actually allowed him to create a nice user interface. Each slide switch has a surface mount LED above it, giving feedback for which beats in the loop are on and off. There’s also a bank of momentary-push buttons seen in blue above. [Matt] uses these to tweak settings like the pitch that is stored for each slide switch. He even puts on a light show with the VGA output.

We’ve seen this Altera board before, used to drive a falling sands game. The hardware will run you around $200 but that’s not bad considering all of the fun things you can do with it.

Continue reading “Sequencer Built On A Cycle II FPGA Board” →

Falling Sand Game On An FPGA

December 15, 2010 by Mike Szczys 17 Comments

This falling sand game runs on a field-programmable gate array. The Altera Cyclone II resides at the heart of that development board, running the game which was written in Verilog. [Skyler Schneider] modeled his project after a Java version of the game called Pyro Sand Game. He treats each pixel of the 640×480 VGA screen as its own cell, following a set of rules to change the cells around it. This is very similar to Conway’s Game of Life, except that there are different categories of cells that behave uniquely (oil, water, plant, fire, etc.) and gravity is a key factor. Of particular interest to us were the rules for each cell, and the method [Skyler] used to feed and sync the VGA output. After the break you can see his demonstration videos, which walk through all of the features including the Troll button.

Continue reading “Falling Sand Game On An FPGA” →