fpga

551 Articles

Yosys Fronts For Xilinx ISE

December 13, 2019 by 13 Comments

We always marvel at how open-source tools can often outstrip their commercial counterparts. Yosys, the open-source tool for Verilog synthesis, is a good example. Although the Xilinx ISE design suite is something close to abandonware, a lot of people still use it because it supports older FPGAs the newer tools don’t. Its Verilog parser is somewhat slow to catch up to new standards, and according to a recent GitHub update, Yosys can now provide files for ISE that target Spartan 6, Virtex 7, and Series 7 FPGAs. In addition, there is some support for Spartan 3, Virtex 2, 4, and 5, although those are not ready yet.

According to the post, you’ll want to use the synth_xilinx command along with the -ise option and a -family option that matches your target (that is, xc6s for Spartan 6).  On the output side, you’ll write an EDIF file using the write_edif command.

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Laptop Like It’s 1979 With A 16-Core Z80 On An FPGA

December 10, 2019 by 46 Comments

When life hands you a ridiculously expensive and massively powerful FPGA dev board, your first reaction may not be to build a 16-core Z80 laptop with it. If it’s not, perhaps you should examine your priorities, because that’s what [Chris Fenton] did, with the result being the wonderfully impractical “ZedRipper.”

Our first impression is that we’ve got to start hanging around a better class of lab, because [Chris] came by this $6000 FPGA board as the result of a lab cleanout; the best we ever scored was a few old Cat-5 cables and some power strips. The Stratix FPGA formed the heart of the design, surrounded by a few breakout boards for the 10.1″ VGA display and the keyboard, which was salvaged from an old PS/2. The 16 Z80 cores running in the FPGA are connected by a ring-topology network, which [Chris] dubs the “Z-Ring”. One of the Z80 cores, the server core, runs CP/M 2.2 and a file server called CP/NET, while the other fifteen machines are clients that run CP/NOS. A simple window manager shows 80 x 25 character terminal sessions for the server and any three of the clients at once, and the whole thing, including a LiPo battery pack, fits into a laser-cut plywood case. It’s retro, it’s modern, it’s overkill, and we absolutely love it.

Reading over [Chris]’s build log puts us in the mood to break out our 2019 Superconference badge and try spinning up a Z80 of our own. If you decide to hack the FPGA-est of conference badges, you might want to check out what [Sprite_TM] has to say about it. After all, he designed it. And you’ll certainly want to look at some of the awesome badge hacks we saw at Supercon.

Thanks to [yNos] for the tip.

David Williams Is “FPGA-Curious”

December 6, 2019 by 17 Comments

If you hadn’t noticed, we had a bit of an FPGA theme running at this year’s Superconference. Why? Because the open-source FPGA toolchain is ripening, and because many of the problems that hackers (and academics) are tackling these days have become complex enough to warrant using them. A case in point: David Williams is a university professor who just wanted to build a quadruped robotics project. Each leg has a complex set of motors, motor drivers, sensors, and other feedback mechanisms. Centralizing all of this data put real strains on the robot’s network, and with so many devices the microcontrollers were running out of GPIOs. This lead him to become, in his words, “FPGA-curious”.

If you’re looking for a gentle introduction to the state of the art in open-source FPGAs, this is your talk. David covers everything, from a bird’s eye view of hardware description languages, through the entire Yosys-based open-source toolchain, and even through to embedding soft-CPUs into the FPGA fabric. And that’s just the first 18 minutes. (Slides for your enjoyment, and you can watch the talk embedded below the break.)
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Gameslab: The Other FPGA Game Console Badge

December 6, 2019 by 2 Comments

Anyone who was at Supercon will no doubt remember the badges that dangled around everyone’s neck. Some were reasonable, while some were neck-straining monsters that added anything and everything to hack the badge into something cool. We saw everything from AI cameras to a fully autonomous vehicle being worn with pride.

Sadly, one that we missed was Gameslab, [Craig J. Bishop]’s FPGA-based portable game console. No, not that FPGA-based game console; in an example of great minds thinking alike, [Craig] had actually been toying with his own handheld console design for quite some time. And we have to say the results are stunning.

The FPGA at the heart of this is a Xilinx Zynq FPGA-ARM Cortex A9 combo SoC, normally a prohibitively expensive monster of a chip. When [Craig] found “refurbished” Zynq chips on eBay for less than 10% of the cost of new units, it was literally game-on for the build. The console required a six-layer PCB to support the big BGA chip and the hundreds of support components around it. There’s a 5″ TFT touchscreen with a video controller implemented in the FPGA, a stereo sound system, and all the buttons and thumbsticks you’d expect on a modern console.

For our money, the best part is the case, about which [Craig] has yet to share any details. But it looks like a machined aluminum plate with wide chamfers around each cutout that contrast nicely with the brushed surface. We’ll be looking forward to more details on that and on progress with Gameslab.

A Fantastic Frontier Of FPGA Flexibility Found In The 2019 Supercon Badge

November 29, 2019 by 7 Comments

We have just concluded a successful Hackaday Superconference where a highlight for many was digging into this year’s hardware badge. Shaped in the general form of a Game Boy handheld gaming console, the heart of the badge is a large FPGA opening up new and exciting potential for badge hacking.

Beyond our normal tools of compiling custom code or modifying hardware with a soldering iron, we now have the option to change core hardware behavior with Verilog. And people explored this new frontier to great effect, as seen at the badge hacking ceremony. (Video embedded below.)

FPGAs are not new, technically speaking, why are they exciting now? We can thank their recent growth in capability, their rapidly falling cost, and the relatively new availability of open source toolchains. These developments elevated FPGA into one of the most exciting trends in hardware today, so this year’s badge master [Sprite_TM] built an open FPGA playground for several hundred of his closest Supercon friends. Let’s take a look at what people were able to accomplish in just a few days using this unique and powerful hardware.

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Old Cisco WAN Card Turned FPGA Playground

November 20, 2019 by 33 Comments

Many of us think of FPGAs as some new cutting edge technology, but the fact of the matter is that they’ve been around for quite some time. They’ve just traditionally been used in hardware that’s too expensive for us lowly hackers. A case in point is the Cisco HWIC-3G-CDMA WAN card. A decade ago these would have been part of a router valued in the tens of thousands of dollars, but today they can be had for less than $10 USD on eBay. At that price, [Tom Verbeure] thought it would be worth finding out if they could be repurposed as generic FPGA experimentation devices.

So as not to keep you in suspense, the short answer is a resounding yes. In the end, all [Tom] had to do was figure out what voltages the HWIC-3G-CDMA was expecting on the edge connector, and solder a 2×5 connector onto the helpfully labeled JTAG header. Once powered up and connected to the computer, Intel’s Quartus Programmer software immediately picked up the board’s Cyclone II EP2C35F484C8 chip. The blinking LEDs seen in the video after the break serve as proof that these bargain bin gadgets are ripe for hacking.

Unfortunately, there’s a catch. After studying the rest of the components on the board, [Tom] eventually came to the conclusion that the HWIC-3G-CDMA has no means of actually storing the FPGA’s bitstream. Presumably it was provided by the router itself during startup. If you just want to keep the board tethered to your computer for experimenting, that’s not really a big deal. But if you want to use it in some kind of project, you’ll need to include a microcontroller capable of pushing the roughly 1 MB bitstream into the FPGA to kick things off.

It might not be as easy to get up and running as the 2019 Hackaday Superconference badge, but it’s certainly a lot easier to get your hands on.

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A Scratch-built RISC-V CPU In An FPGA

November 19, 2019 by 17 Comments

“RISC architecture is going to change everything”, which is why [SHAOS] is building this cool RISC-V DIY retro-style computer.

The project took inspiration from another hacker’s work in building a RISC-V emulator; shared in the Hackaday FPGA chat. He took it a bit further and got it going on an UPDuino v2.0 board which features a iCE40 FPGA from Lattice.

The board passes all the tests for the RISC-V subset he’s aiming for and even run some Zephry RTOS examples. He’s done a really good job of documenting how he got the code to run as well as many of the experiments he’s run so far. All the project files for ICEcube2 software are posted. It’s not the only RISC-V CPU we’ve seen in an FPGA, but the code is actually very clear and worth a read if you’re into such things.

We think anyone interested in duplicating his work could do so somewhat easily and start playing around with this increasingly popular architecture. Or at least get some LED’s blinking in an arcane but meaningful way. Video after the break.

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