Of Roach Killer And Rust Remover: Sam Zeloof’s Garage-Made Chips

November 19, 2018 by Dan Maloney 28 Comments

A normal life in hacking, if there is such a thing, seems to follow a predictable trajectory, at least in terms of the physical space it occupies. We generally start small, working on a few simple projects on the kitchen table, or if we start young enough, perhaps on a desk in our childhood bedroom. Time passes, our skills increase, and with them the need for space. Soon we’re claiming an unused room or a corner of the basement. Skills build on skills, gear accumulates, and before you know it, the garage is no longer a place for cars but a place for pushing back the darkness of our own ignorance and expanding our horizons into parts unknown.

It appears that Sam Zeloof’s annexation of the family garage occurred fairly early in life, and to a level that’s hard to comprehend. Sam seems to have caught the hacking bug early, and by the time high school rolled around, he was building out a remarkably well-equipped semiconductor fabrication lab at home. Sam has been posting his progress regularly on his own blog and on Twitter, and he dropped by the 2018 Superconference to give everyone a lesson on semiconductor physics and how he became the first hobbyist to produce an integrated circuit using lithographic processes.

Continue reading “Of Roach Killer And Rust Remover: Sam Zeloof’s Garage-Made Chips” →

Ken Shirriff Chats About A Whole World Of Chip Decapping

October 11, 2018 by Mike Szczys 16 Comments

Reverse engineering silicon is a dark art, and when you’re just starting off it’s best to stick to the lesser incantations, curses, and hexes. Hackaday caught up with Ken Shirriff at last year’s Supercon for a chat about the chip decapping and reverse engineering scene. His suggestion is to start with an old friend: the 555 timer.

Ken is well-known for his work photographing the silicon die at the heart of an Integrated Circuit (IC) and mapping out the structures to create a schematic of the circuit. We’re looking forward to Ken’s talk in just a few weeks at the Hackaday Superconference. Get a taste of it in the interview video below.

Continue reading “Ken Shirriff Chats About A Whole World Of Chip Decapping” →

Retro-uC, Your Favorite Instruction Sets On Custom Silicon

August 23, 2018 by Brian Benchoff 29 Comments

A few months ago, we caught wind of an interesting project in Big-O Open silicon. It’s a chip, loaded up with the great CPU cores of yore. Now, it’s finally a project on Crowd Supply. The Retro-uC project is an Open Source microcontroller for the retro geek, with a Zilog Z80, MOS 6502, and Motorola 68000 buried in the epoxy of a single QFP package. Oh yes, custom silicon and retro goodness, what more could you want?

The Retro-uC project is part of the Chips4Makers project to develop an Open Source chip for the community. Of course, this has been done before with projects like the HiFive1 and other RISC-V implementations, but really — this is a Z80, 6502 and 68k on a single chip. Let’s not bury the lede here.

As far as the architecture and implementation of these cores go, the ‘active’ core is externally selected on reset, or can be changed through the JTAG interface. There are 72 GPIO pins that can handle 5V, with each pin mapped to the address space of the cores. So far, so good. We can make this work for some really cool stuff.

The JTAG interface is used for testing and programming, although programs can be stored on an external I2C Flash chip and booted from there. There is 4kB of on-chip RAM, and while the peripheral configuration is still being determined, there will at least be UART, I2C, and PWM peripherals. How many of each is anyone’s guess.

The Retro-uC is now a Crowd Supply project, with rewards/orders/whatever ranging from a bare Retro-uC chip for $42 USD to an Arduino Mega-ish development platform for $89, a breadboard version of the chip for $59, and a chip mounted to a Perf2+ prototyping board for $65.

While this chip hasn’t even gotten to tape-out, all the cores work on an FPGA, and there is precedent for doing Open Source, crowdfunded silicon. We’re looking at this one closely and are excited to see what everyone is going to make.

This project has been a long time in the making, with the project lead giving a talk at FOSDEM earlier this year. Now it’s finally time for the hard part of any silicon project — getting the money — and we’re looking forward to see what comes of it.

Robert Hall And The Solid-State Laser

May 22, 2018 by Dan Maloney 13 Comments

The debt we all owe must be paid someday, and for inventor Robert N. Hall, that debt came due in 2016 at the ripe age of 96. Robert Hall’s passing went all but unnoticed by everyone but his family and a few close colleagues at General Electric’s Schenectady, New York research lab, where Hall spent his remarkable career.

That someone who lives for 96% of a century would outlive most of the people he had ever known is not surprising, but what’s more surprising is that more notice of his life and legacy wasn’t taken. Without his efforts, so many of the tools of modern life that we take for granted would not have come to pass, or would have been delayed. His main contribution started with a simple but seemingly outrageous idea — making a solid-state laser. But he ended up making so many more contributions that it’s worth a look at what he accomplished over his long career.

Continue reading “Robert Hall And The Solid-State Laser” →

Fail Of The Week: The Semiconductor Lapping Machine That Can’t Lap Straight

May 21, 2018 by Dan Maloney 34 Comments

It seemed like a good idea to build a semiconductor lapping machine from an old hard drive. But there’s just something a little off about [electronupdate]’s build, and we think the Hackaday community might be able to pitch in to help.

For those not into the anatomy and physiology of semiconductors, getting a look at the inside of the chip can reveal valuable information needed to reverse engineer a device, or it can just scratch the itch of curiosity. Lapping (the gentle grinding away of material) is one way to see the layers that make up the silicon die that lies beneath the epoxy. Hard drives designed to spin at 7200 rpm or more hardly seem a suitable spinning surface for a gentle lapping, but [electronupdate] just wanted the platter for its ultra-smooth, ultra-flat surface.

He removed the heads and replaced the original motor with a gear motor and controller to spin the platter at less than 5 rpm. A small holder for the decapped die was fashioned, and pinched between the platter hub and an idler. It gently rotates the die against the abrasive-covered platter as it slowly revolves. But the die wasn’t abrading evenly. He tried a number of different fixtures for the die, but never got to the degree of precision needed to see through the die layer by layer. We wonder if the weight of the die fixture is deflecting the platter a bit?

Failure is a great way to learn, if you can actually figure out where you went wrong. We look to the Hackaday community for some insight. Check out the video below and sound off in the comments if you’ve got any ideas.

Continue reading “Fail Of The Week: The Semiconductor Lapping Machine That Can’t Lap Straight” →

Custom Chips As A Service

April 24, 2018 by Brian Benchoff 80 Comments

Ages ago, making a custom circuit board was hard. Either you had to go buy some traces at Radio Shack, or you spent a boatload of money talking to a board house. Now, PCBs are so cheap, I’m considering tiling my bathroom with them. Today, making a custom chip is horrifically expensive. You can theoretically make a transistor at home, but anything more demands quartz tube heaters and hydrofluoric acid. Custom ASICs are just out of reach for the home hacker, unless you’re siphoning money off of some crypto Ponzi scheme.

Now things may be changing. Costs are coming down, the software toolchain is getting there, and Onchip, the makers of an Open Source 32-bit microcontroller are now working on what can only be called a, ‘OSH Park for silicon’. They’re calling it Itsy-Chipsy, and it’s promising to bring you your own chip for as low as $100.

The inspiration for this business plan comes from services like MOSIS that allows university classes to design their own chips on multi-project wafers. This aggregates multiple chips onto one wafer, bringing the cost of a prototype down from tens of thousands of dollars to about five thousand dollars, or somewhere around a thousand dollars a chip.

Itsy-Chipsy is taking this batch processing one step further. This is a platform that combines multiple projects on one die. That thousand dollar chip is now sixteen different projects, tied together with regulators, current sources, clocks, and process monitors. Using a 2 mm by 2 mm chip size, Itsy-Chipsy gives chip designers 350 μm of silicon using a 180 nm CMOS process. That’s enough for a basic 32-bit RISC-V microprocessor in a QFN or DIP 40 for just one hundred dollars.

This project is a contender for The Hackaday Prize — the Prize ends in November and we’d be amazed to see results by then. The Onchip team is talking to foundries, though, and it looks like there’s interest for this model in the industry. We’d guess that the best case scenario is a crowdfunding campaign for an OSH Park-like chip fab sometime in 2019. Whenever it comes, this is something we’re eagerly awaiting.

How To Reverse Engineer Silicon

January 16, 2018 by Brian Benchoff 19 Comments

A few semesters back, [Jordan] was in an Intro to Hardware Security course at CMU. The final project was open ended, and where some students chose projects like implementing a crypto algorithm or designing something on an FPGA, [Jordan] decided to do something a little more ambitious. He wanted to decapsulate and reverse engineer an IC. No, this isn’t taking a peek at billions of transistors — [Jordan] chose a 74-series Quad XOR for this project — but it does show what goes into reverse engineering silicon, and how even simple chips can be maddeningly confusing.

The first step to reverse engineering a chip is decapsulation, and for this [Jordan] had two options. He could drop acid, or he could attack a ceramic package with an endmill. While hot nitric acid is effective and fun, it is a bit scary, so [Jordan] mounted a few chips in a 3D printed holder wedged in the vice on his mill. By slowly bringing the Z axis down a few thou at a time, he was able to find the tiny 1 mm square bit of silicon embedded in this chip. With the help of a grad student and the cleanroom, this square of sand was imaged with a very nice microscope.

Now that [Jordan] had an image of the silicon itself, he had to reverse engineer the chip. You might think that with less than a dozen transistors in there, designing an XOR out of transistors is something anyone with a bit of Minecraft experience can do. This line of thinking proved to be a trap. Technically, this wasn’t an XOR gate. It was a transmission gate XNOR gate with a big inverter on the output. Logically, it’s the same, but when it comes to silicon fabrication, the transmission gate XNORs aren’t able to sink or source a lot of current. By designing the chip as an XNOR with an inverter, the chip designers were able to design a simple chip that could still meet the spec.

While [Jordan] managed to reverse engineer the chip, this was quite possibly the simplest chip he could reverse engineer. The Quad XOR is just the same silicon repeated four times, anyway. This is the baseline for all efforts to reverse engineer silicon, and there were still a few confusing traps.