Pipelining Digital Logic In FPGAs

June 5, 2018 by Al Williams 11 Comments

When you first learn about digital logic, it probably seems like it is easy. You learn about AND and OR gates and figure that’s not very hard. However, going from a few basic gates to something like a CPU or another complex system is a whole different story. It is like going from “Hello World!” to writing an operating system. There’s a lot to understand before you can make that leap. In this set of articles, I want to talk about a way to organize more complex FPGA designs like CPUs using a technique called pipelining.

These days a complex digital logic system is likely to be on an FPGA. And part of the reason we can get fooled into thinking digital is simple is because of the modern FPGA tools. They hide a lot of complexity from you, which is great until they can’t do what you want and then you are stuck. A good example of that is where you are trying to hit a certain clock frequency. If you aren’t careful, you’ll get a complaint from the tool that you can’t meet timing constraints.

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Retro Rebuild Recreates SGI Workstation Demos On The Go

May 23, 2018 by Kerry Scharfglass 21 Comments

When [Lawrence] showed us the Alice4 after Maker Faire Bay Area last weekend it wasn’t apparent how special the system was. The case is clean and white, adorned only with a big red button below a 7″ screen with a power switch around the back. When the switch is flicked the system boots to display a familiar animation and drops you at a menu. Poking around from here elicits a variety of self-contained graphics demos, some interactive. So this is a Raspberry Pi in a box playing videos, right? Not even close.

Often retro computing focuses on personal computer systems. When they were new the 8-bit graphics or intricate 2D sprites were state of the art, but now their appeal tends towards learning opportunities and the thrill of nostalgia. This may still be true of Alice4, the system [Brad, Lawrence, Mike, and Chris] put together to run Silicon Graphics (SGI) demos from the mid 1980’s but it’s not the whole story. [Lawrence] and [Brad] had both worked at SGI during its heyday and had fond memories of the graphics demos that shipped with those mammoth workstation. So they built Alice4 from the FPGA up to run those very same demos in real-time.

Thanks to Moore’s law, today’s embedded systems put yesterday’s powerhouses within reach. [Lawrence] and [Brad] found the old demo code in a ratty FTP server, and tailor-made Alice4’s software and hardware to run them natively. [Brad] wrote a libgl which implements the subset of the IrisGL API needed to support their selected set of demos. The libgl emits sets of triangles to the SDRAM where [Lawrence’s] HDL running on the onboard FPGA fetches them to interpolate color and depth and draw the result on-screen. Together they allow the $99 Altera Cyclone V development board at Alice4’s heart to run these state of the art demos in the palm of your hand.

Alice4 is open source and extensively documented. Peruse the archeology of reverse engineering the graphics API or the discussion of FIFO design in the FPGA. If those don’t sate your appetite check out a video of Alice4 in action after the break.

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Parallel Programming For FPGAs

May 19, 2018 by Al Williams 12 Comments

One of the best features of using FPGAs for a design is the inherent parallelism. Sure, you can write software to take advantage of multiple CPUs. But with an FPGA you can enjoy massive parallelism since all the pieces are just hardware. Every light switch in your house operates in parallel with the others. There’s a new edition of a book, titled Parallel Programming for FPGAs that explores that topic in depth and it is under the Creative Commons license. In particular, the book focuses on using Vivado HLS instead of the more traditional Verilog or VHDL.

HLS allows a designer to express a high-level algorithm in C, C++, or SystemC. Given a bit more information, HLS will convert that into an FPGA configuration. That doesn’t mean, though, that you can just cut and paste ordinary C code. HLS has several restrictions due to the fact that it is compiling to logic gates, not lines of code. Actually, it also generates Verilog or VHDL, but if you do it right, that should be transparent to you.

After the introduction, the book is more like a series of monographs on very specific topics, but the depth of each is very impressive. There’s plenty of DSP examples, of course. There’s also general math, so if you ever wondered how to compute a sine or cosine in an FPGA, read chapter 3.

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Vector Network Analyzer Uses SoC FPGA

May 9, 2018 by Al Williams 15 Comments

If you are working with AC circuits a vector network analyzer (VNA) is quite handy. As an entry to the InnovateFPGA competition for students, [Evgenii Vostrikov], [Danila Nikiforovskii], and [Daniil Smirnov] created a VNA using a DE10-Nano, high-speed analog to digital and digital to analog converters, and a circulator. Most of the details are in the video below, and on the project’s GitHub page.

The DE10-Nano has a dual-core ARM processor and an Altera FPGA in one package. That allows you to use the CPUs where that makes sense and still leverage the FPGA where you need high performance.

The circulator uses an op-amp to allow the test signal to route to the device under test, while steering any reflected signal back to the device for measurement. The design also uses a lock-in amplifier, something we’ve talked about a few times recently. This allows less expensive converters to generate magnitude and phase information.

Judging by the fan in the video, we suspect the setup gets a little toasty. The GitHub page has a lot of Russian on it, so we aren’t sure how much we could puzzle out since our Russian skills were mostly from watching the Adventures of Moose and Squirrel.

If you are interested in a VNA, they aren’t as expensive as they used to be. Particularly, if you roll your own and already have some things in your junk box.

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Tiny Arduino + FPGA = Sno

April 30, 2018 by Al Williams 33 Comments

Alorium rolled out a new product late last year that caught our attention. The Sno (pronounced like “snow”) board is a tiny footprint Arduino board that you can see in the video below. By itself that isn’t that interesting, but the Sno also has an Altera/Intel Max 10 FPGA onboard. If you aren’t an FPGA user, don’t tune out yet, though, because while you can customize the FPGA in several ways, you don’t have to.

Like Alorium’s XLR8 product, the FPGA comes with preprogrammed functions and a matching Arduino API to use them. In particular, there are modules to do analog to digital conversion, servo control, operate NeoPixels, and do floating point math.

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Neural Networks… On A Stick!

April 24, 2018 by Al Williams 14 Comments

They probably weren’t inspired by [Jeff Dunham’s] jalapeno on a stick, but Intel have created the Movidius neural compute stick which is in effect a neural network in a USB stick form factor. They don’t rely on the cloud, they require no fan, and you can get one for well under $100. We were interested in [Jeff Johnson’s] use of these sticks with a Pynq-Z1. He also notes that it is a great way to put neural net power on a Raspberry Pi or BeagleBone. He shows us YOLO — an image recognizer — and applies it to an HDMI signal with the processing done on the Movidius. You can see the result in the first video, below.

At first, we thought you might be better off using the Z1’s built-in FPGA to do neural networks. [Jeff] points out that while it is possible, the Z1 has a lower-end device on it, so there isn’t that much FPGA real estate to play with. The stick, then, is a great idea. You can learn more about the device in the second video, below.

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