Hackaday Links: March 6, 2022

March 6, 2022 by Dan Maloney 12 Comments

As if the war in Ukraine weren’t bad enough right here on Earth, it threatens knock-on effects that could be felt as far away as Mars. One victim of the deteriorating relationships between nations is the next phase of the ExoMars project, a joint ESA-Roscosmos mission that includes the Rosalind Franklin rover. The long-delayed mission was most recently set for launch in October 2022, but the ESA says that hitting the narrow launch window is now “very unlikely.” That’s a shame, since the orbital dynamics of Earth and Mars will mean that it’ll be 2024 before another Hohmann Transfer window opens. There are also going to be repercussions throughout the launch industry due to Russia pulling the Soyuz launch team out of the ESA’s spaceport in Guiana. And things have to be mighty tense aboard the ISS right about now, since the station requires periodic orbital boosting with Russian Progress rockets.

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New Part Day: The RISC-V Lichee-RV Module And Dock

January 6, 2022 by Dave Rowntree 47 Comments

Sipeed have been busy leveraging developments in the RISC-V arena, with an interesting, low-cost module they call the Lichee RV. It is based around the Aliwinner D1 SoC (which contains a Pingtou Xuantie C906 for those following Chinese RISC-V processor development) with support for an optional NAND filesystem. This little board uses a pair of edge connectors, similar to the Raspberry Pi CM3 form factor, except it’s based around a pair M.2 connectors instead. The module has USB-C, an SPI LCD interface, as well as a TF card socket on-board, with the remaining interfaces provided on the big edge connector.

The minimalist Allwinner D1-based Lichee RV

So that brings us onto the next Sipeed board, the Lichee RV Dock which is a tiny development board for the module. This breaks out the HDMI, adds USB, a WiFi/Bluetooth module, audio driver, microphone array interface and even a 40-way GPIO connector. Everything you need to build your own embedded cloud-connected device.

Early adopters beware, though, Linux support is still in the early stages of development, apparently with Debian currently the most usable. We’ve not tested one ourselves yet, but it does look like quite useful for those projects with a small budget and not requiring the power-hungry multi-core performance of a Raspberry Pi or equivalents.

We’ve seen the Sipeed MAix M1 AI Module hosted on a Pi Hat a couple of years ago, as well as a NES emulator running on the Sipeed K210. The future for RISC-V is looking pretty good if you ask us!

Thanks [Maarten] for the tip!

Apple Falling Division

December 9, 2021 by Al Williams 23 Comments

[Paul Curtis] over at Segger has an interesting series of blog posts about calculating division. This used to be a hotter topic, but nowadays many computers or computer languages have support for multiplication and division built-in. But some processors lack the instructions and a library to do it might be less than ideal. Knowing how to roll your own might allow you to optimize for speed or space. The current installment covers using Newton’s algorithm to do division.

Steve Martin had a famous bit about how to be a millionaire and never pay taxes. He started out by saying, “First… get a million dollar. Then…” This method is a bit like that since you first have to know how to multiply before you can divide. The basic premise is twofold: Newton’s method let you refine an estimate of a reciprocal by successive multiplications and then multiplying a number a reciprocal is the same as dividing. In other words, if we need to divide 34 by 6, you could rewrite 34/6 to 34 * 1/6 and the answer is the same.

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RISC-V In… Typescript?

October 14, 2021 by Al Williams 8 Comments

We are accustomed to seeing RISC-V implementations in Verilog or VHDL, but [Low Level JavaScript] has one in TypeScript. Before you dismiss it as a mere emulator, know that the project relies on gateware-ts, a conversion between TypeScript and Verilog. From there, you can actually put the CPU on an FPGA. You can see the launch video below and there is one development video as well as, presumably, more to come.

We aren’t sure if many FPGA designers will be willing to switch to TypeScript. But if you are comfortable with it, it might open up FPGA development without having to learn as much of a new language.

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Hands-On: Whiskey Pirates DC29 Hardware Badge Blings With RISC-V

August 6, 2021 by Mike Szczys 6 Comments

The Whiskey Pirates have once again dropped an excellent electronic badge for DEF CON 29. This is, of course, unofficial, but certainly makes the list of the hottest custom bling seen so far this year.

I’m not able to make it to the con in person, but the Pirates sent over one of these badges anyway for an early look. It’s gorgeous, and peering into the circuit board it would be easy to think that the chip shortage ain’t got nothin’ on this badge. But this was possible only because of some very creative parts sourcing, and a huge dose of inspired design work.

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New Part Day: An ESP With ZigBee

August 4, 2021 by Jenny List 26 Comments

It seems that the folks at Espressif are doing their best to produce chips to fit every possible niche in the microcontroller-with-radio market, because here comes news of their latest chip bearing the ESP32 name: a single-core 96MHz RISC-V part with built-in IEEE 802.15.4 to support ZigBee 3.x and Thread 1.x. The ESP32-H2 is not the most powerful of the Espressif line-up, but it will find its place in home automation products and projects.

The ESP32-H2 joins a multitude of other IEEE 802.15.4 devices from manufacturers such as Microchip, ST, NXP, and Nordic in an increasingly crowded marketplace, so what can if offer that the others can’t? If previous ESP chips are anything to go by we’d expect it to compete on price as well as the obvious attraction for developers used to working with other Espressif products. We look forward as always to seeing what you do with it.

Custom RISC-V Processor Built In VHDL

August 3, 2021 by Bryan Cockfield 30 Comments

While ARM continues to make inroads into the personal computing market against traditional chip makers like Intel and AMD, it’s not a perfect architecture and does have some disadvantages. While it’s a great step on the road to software and hardware freedom, it’s not completely free as it requires a license to build. There is one completely open-source and free architecture though, known as RISC-V, and its design and philosophy allow anyone to build and experiment with it, like this build which implements a RISC-V processor in VHDL.

Since the processor is built in VHDL, a language which allows the design and simulation of integrated circuits, it is possible to download the code for the processor and then program it into virtually any FPGA. The processor itself, called NEORV32, is designed as a system-on-chip complete with GPIO capabilities and of course the full RISC-V processor implementation. The project’s creator, [Stephan], also struggled when first learning about RISC-V so he went to great lengths to make sure that this project is fully documented, easy to set up, and that it would work out-of-the-box.

Of course, since it’s completely open-source and requires no pesky licensing agreements like an ARM platform might, it is capable of being easily modified or augmented in any way that one might need. All of the code and documentation is available on the project’s GitHub page. This is the real benefit of fully open-source hardware (or software) which we can all get behind, even if there are still limited options available for RISC-V personal computers for the time being.

How does this compare to VexRISC or PicoSOC? We don’t know yet, but we’re always psyched to have choices.