What Every PCB Designer Needs To Know About Track Impedance With Eric Bogatin

September 12, 2022 by Dave Rowntree 7 Comments

PCB design starts off being a relatively easy affair — you create a rectangular outline, assign some component footprints, run some traces, and dump out some Gerber files to send to the fab. Then as you get more experienced and begin trying harder circuits, dipping into switching power supplies, high speed digital and low noise analog, things get progressively more difficult; and we haven’t even talked about RF or microwave design yet, where things can get just plain weird from the uninitiated viewpoint. [Robert Feranec] is no stranger to such matters, and he’s teamed up with one of leading experts (and one of this scribe’s personal electronics heroes) in signal integrity matters, [Prof. Eric Bogatin] for a deep dive into the how and why of controlled impedance design.

RG58 cable construction. These usually are found in 50 Ω and less commonly these days 75Ω variants

One interesting part of the discussion is why is 50 Ω so prevalent? The answer is firstly historical. Back in the 1930s, coaxial cables needed for radio applications, were designed to minimize transmission loss, using reasonable dimensions and polyethylene insulation, the impedance came out at 50 Ω. Secondarily, when designing PCB traces for a reasonable cost fab, there is a trade-off between power consumption and noise immunity.

As a rule of thumb, lowering the impedance increases noise immunity at the cost of more power consumption, and higher impedance goes the other way. You need to balance this with the resulting trace widths, separation and overall routing density you can tolerate.

Another fun story was when Intel were designing a high speed bus for graphical interfaces, and created a simulation of a typical bus structure and parameterized the physical constants, such as the trace line widths, dielectric thickness, via sizes and so on, that were viable with low-cost PCB fab houses. Then, using a Monte Carlo simulation to run 400,000 simulations, they located the sweet spot. Since the via design compatible with the cheap fab design rules resulted often in a via characteristic impedance that came out quite low, it was recommended to reduce the trace impedance from 100 Ω to 85 Ω differential, rather than try tweak the via geometry to bring it up to match the trace. Fun stuff!

We admit, the video is from the start of the year and very long, but for such important basic concepts in high speed digital design, we think it’s well worth your time. We certainly picked up a couple of useful titbits!

Now we’ve got the PCB construction nailed, why circle back and go check those cables?

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Renewable Hydrogen Sucked From Thinish Air

September 11, 2022 by Dave Rowntree 26 Comments

Stored hydrogen is often touted as the ultimate green energy solution, provided the hydrogen is produced from genuinely green power sources. But there are technical problems to be overcome before your average house will be heated with pumped or tank-stored hydrogen. One problem is that the locations that have lots of scope for renewable energy, don’t always have access to plenty of pure water, and for electrolysis you do need both. A team from Melbourne University have come up with a interesting way to produce hydrogen by electrolysis directly from the air.

Redder areas have more water risk and renewable potential

By utilising a novel electrolysis cell with a hygroscopic electrolyte, the so-called direct air electrolysis (DAE) can operate with humidity as low as 4% relative, so perfectly fine even in the most arid areas, after all there may not be clouds but the air still holds a bit of water. This is particularly relevant to regions of the world, such as deserts, where there is simultaneously a high degree of water risk, and plenty of solar potential. Direct electrolysis of saline extracted at coastal areas is one option, but dealing with the liberated chlorine is a big problem.

The new prototype is very simple in construction, with a sponge of melamine or a sintered glass foam soaked in a compatible electrolyte. Potassium Hydroxide (alkaline) was tried as was Potassium Acetate (base) and Sulphuric Acid, but the latter degraded the host material in a short time. Who would have imagined? Anyway, with electrolysis cell design, a key problem is ensuring the separate gasses stay separate, and in this case, are also separate from the air. This was neatly ensured by arranging the electrolyte sponge fully covered both electrodes, so as the hygroscopic material extracted water from the air, the micro-channels in the structure filled up with liquid, with it touching both ends of the cell, forming the circuit and allowing the electrolysis to proceed.

Hydrogen, being very light, would rise upward through holes in the cathode, to be collected and stored. Oxygen simply passed back into the air, after passing though the liquid reservoir at the base. Super simple, and from reading the paper, quite effective too.

You can kind of imagine a future built around this now, where you’re driving your hydrogen fuel cell powered dune buggy around the Sahara one weekend, and you stop at a solar-powered hydrogen fuel station for a top up and a pasty. Ok, possibly not that last bit.

The promised hydrogen economy may be inching closer. We covered using aluminium nanoparticles to rip hydrogen out of water. But once you have the gas, you need to store and handle it. Toyota might have a plan for that. Then perhaps handling gas directly at all isn’t a great idea, and maybe the future is paste?

Thanks to [MmmDee] for the tip!

Ztachip Accelerates Tensorflow And Image Workloads

September 9, 2022 by Dave Rowntree 6 Comments

[Vuong Nguyen] clearly knows his way around artificial intelligence accelerator hardware, creating ztachip: an open source implementation of an accelerator platform for AI and traditional image processing workloads. Ztachip (pronounced “zeta-chip”) contains an array of custom processors, and is not tied to one particular architecture. Ztachip implements a new tensor programming paradigm that [Vuong] has created, which can accelerate TensorFlow tasks, but is not limited to that. In fact it can process TensorFlow in parallel with non-AI tasks, as the video below shows.

A RISC-V core, based on the VexRiscV design, is used as the host processor handling the distribution of the application. VexRiscV itself is quite interesting. Written in SpinalHDL (a Scala variant), it’s super configurable, producing a Verilog core, ready to drop into the design.

A Digilent Arty-A7, Arducam and a VGA PMOD is all you need

From a hardware design perspective the RISC-V core hooks up to an AXI crossbar, with all the AXI-lite busses muxed as is usual for the AMBA AXI ecosystem. The Ztachip core as well as a DDR3 controller are also connected, together with a camera interface and VGA video.

Other than providing an FPGA-specific DDR3 controller and AXI crossbar IP, the rest of the design is generic RTL. This is good news. The demo below deploys onto an Artix-7 based Digilent (Arty-A7) with a VGA PMOD module, but little else needed. Pre-build Xilinx IP is provided, but targeting a different FPGA shouldn’t be a huge task for the experienced FPGA ninja.

The magic happens in the Ztachip core, which is mostly an array of Pcores. Each Pcore has both vector and scalar processing capability, making it super flexible. The Tensor Engine (internally this is the ‘dataplane processor’) is in charge here, sending instructions from the RISC-V core into the Pcore array together with image data, as well as streaming video data out. That camera is only a 0.3 MP Arducam, and the video is VGA resolution, but give it a bigger FPGA and those limits could be raised.

This domain-specific approach uses a highly modified C-like language (with a custom compiler) to describe the application that is to be distributed across the accelerator array. We couldn’t find any documentation on this, but there are a few example algorithms.

The demo video shows a real-time mix of four algorithms running in parallel; one object classification (Google’s Tensorflow mobilenet-ssd, a pre-trained AI model) canny edge detection, a Harris corner detection, and Optical flow which gives it a predator-like motion vision.

[Vuong] reckons, efficiency wise it is 5.5x more computationally efficient than a Jetson Nano and 37x more than Google’s TPU edge. These are bold claims, to say the least, but who are we to argue with a clearly incredibly talented engineer?

We cover many AI-related topics, like this AI assisted tap-typing gadget, for starters. And not wanting to forget about the original AI hardware, the good old-fashioned neuron, we got that covered as well!

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Ethersweep: An Easy-To-Deploy Ethernet Connected Stepper Controller

September 7, 2022 by Dave Rowntree 35 Comments

[Neumi] over on Hackaday.IO wanted a simple-to-use way to drive stepper motors, which could be quickly deployed in a wide variety of applications yet to be determined. The solution is named Ethersweep, and is a small PCB stack that sits on the rear of the common NEMA17-format stepper motor. The only physical connectivity, beside the motor, are ethernet and a power supply via the user friendly XT30 connector. The system can be closed loop, with both an end-stop input as well as an on-board AMS AS5600 magnetic rotary encoder (which senses the rotating magnetic field on the rear side of the motor assembly – clever!) giving the necessary feedback. Leveraging the Trinamic TMC2208 stepper motor driver gives Ethersweep silky smooth and quiet motor control, which could be very important for some applications. A rear-facing OLED display shows some useful debug information as well as the all important IP address that was assigned to the unit.

Control is performed with the ubiquitous ATMega328 microcontroller, with the Arduino software stack deployed, making uploading firmware a breeze. To that end, a USB port is also provided, hooked up to the uC with the cheap CP2102 USB bridge chip as per most Arduino-like designs. The thing that makes this build a little unusual is the ethernet port. The hardware side of things is taken care of with the Wiznet W5500 ethernet chip, which implements the MAC and PHY in a single device, needing only a few passives and a magjack to operate. The chip also handles the whole TCP/IP stack internally, so only needs an external SPI interface to talk to the host device.

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Organise Your Hacks With TreeSheets: An Open Source Hierarchical Spreadsheet

September 7, 2022 by Dave Rowntree 42 Comments

Some people may have heard of Dutch programmer [Wouter Van Oortmerssen] since he’s the creator of the Amiga-E programming language, as well as being involved with several game engines. Heard of SimCity? How about Borderlands 2 or Far Cry? Having had clearly a long and illustrious career as a programmer for a variety of clients — including a long stint at Google, working on Web Assembly — many people will be familiar with at least some of his work. But you may not have heard of his TreeSheets productivity tool. Which would be a shame, as you’ve been missing out on something pretty darn useful.

TreeSheets is described as a hierarchical spreadsheet, which is intended as a replacement for several distinct tools; think spreadsheets, mindmaps and text editors and similar. In [Wouter]’s words:

It’s like a spreadsheet, immediately familiar, but much more suitable for complex data because it’s hierarchical.
It’s like a mind mapper, but more organized and compact.
It’s like an outliner, but in more than one dimension.
It’s like a text editor, but with structure.

Having been in development for about a decade, TreeSheets might look a bit dated here and there, but the design is clear and distraction-free, which is exactly what you need when you’re trying to focus on the task in hand. Why not give it a try and see if it works for you? After the break, you can see a video tutorial by YouTube user [DrilixProject].

No strangers to productivity hacks, here’s Pomodachi, a cute pomodoro timer crossed with a Tamagotchi. Sometimes productivity isn’t solved with software tools, but more to do with your attitude to projects. Finally sometimes the route to greater productivity is a little closer to home, like inside your head.

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A Simple Web Configured BLE To GPIO Bridge

September 6, 2022 by Dave Rowntree 5 Comments

[Daniel Dakhno] kept ending up in a situation where the ability to read the status of, or control a few digital IO pins with minimal effort, would be terribly useful. Not wanting to keep compiling code, for such simple needs, they instead used a nRF51-based module as a physical interface and produced a general purpose firmware that could be configured with a simple web interface. The NRF51-IO-module was born, whose job is to pair with whatever device you have in front of you, provided it supports BLE, and give direct access to those IO pins.

Rather than acting as a rather slow logic analyser, the firmware is intended for mostly static configurations. The web application sends a configuration packet over to the nRF51 board, which then programs it into FLASH and restarts, reading the updated configuration and applying it to the IO pins. These outputs then persist as long as there is power. The read-side of the equation can also be performed via the web page, but we didn’t have a chance to verify that. The code implements the Bluetooth automation IO service as well as the binary sensor service so if you have access to applications that talk these services, then you should be able to fire it up and go with it, although we’ve not personally tested this due to lack of an nRF51 board. We noticed that the Home Assistant automation platform supports the BT binary sensor, which might be a big help for some people with a need for some wireless control and sensing.

If you need a practical example of a use for remote sensing, here’s a physical mailbox status monitor, using the nRF51. Whilst we’re thinking of Bluetooth and sensors, here’s a custom firmware for some super cheap environment sensors that frees them from vendor lock-in.

Header image: Ubahnverleih, CC0.

Food Safe 3D Printing: A Study

September 5, 2022 by Dave Rowntree 43 Comments

[Matt Thomas] wanted to answer the question of whether 3D printed structures can be food-safe or even medical-safe, since there is an awful lot of opinion out there but not a lot of actual science about the subject. As a mechanical engineer who dabbles in medical technical matters, he designed as series of tests using a wide range of nasty-sounding pathogens, to find once and for all what works and what does not.

One common argument sprung up from the maker movement response to COVID-19, 3D printed masks and visors. Many of us (this scribe included) printed many thousands of visor frames and ear protectors, using the armies of 3D printers we had available, then distributed them to nursing homes and doctors’ surgeries, and anywhere else that couldn’t get ‘proper’ medical-grade items.

There was much opinion about the risks associated with contamination of such 3D printed structures, due to the allegedly porous nature of the prints. [Matt] has shown with some SEM imaging, that a typical 3D print does not have any detectable porosity, and that the grooves due to the layer lines are so positively huge compared to your average bacterium, as to also be irrelevant.

Cutting to the chase, [Matt] shows that ordinary dish soap and water are totally sufficient to remove 90% or more of all of the pathogens he tested, and that using a mix of culturing swap samples as well as protein detection, that 3D printed parts could be cleaned close to medical standards, let alone those of food handling. Even those pesky biofilms could be quickly dispatched with either a quick rinse in bleach-water or a scrub with baking soda. Does this article clear this up finally? Only you can decide!

We’ve obviously covered the subject of 3D printing masks a fair bit, but it’s not all about PPA, sometimes ventilators need some 3D printing love too. Prusa did some work on the subject of food safety, looking specifically at post-processing for 3D prints, and produced some interesting results.

Thanks to [Keith] for the tip!