You may have heard the phrase “flip-chip” before: it’s a broad term referring to several integrated circuit packaging methods, the common thread being that the semiconductor die is flipped upside down so the active surface is closest to the PCB. As opposed to the more traditional method in which the IC is face-up and connected to the packaging with bond wires, this allows for ultimate packaging efficiency and impressive performance gains. We hear a lot about advances in the integrated circuits themselves, but the packages that carry them and the issues they solve — and sometimes create — get less exposure.
Let’s have a look at why semiconductor manufacturers decided to turn things on their head, and see how radioactive solder and ancient Roman shipwrecks fit in.
What do you do when you’re working with some vintage ICs and one of the tiny legs pops off? That’s what happened to [Kotomi] when working with an old Super Nintendo. A single lead for the sound chip just snapped off, leaving [Kotomi] one pin short of a working system (the Google Translatrix). This is something that can be fixed, provided you have a steady hand and a rotary tool that’s spinning at thousands of RPM.
Fixing this problem relies on a little bit of knowledge of how integrated circuits are built. There’s a small square of silicon in there, but this tiny die is bonded to a metal leadframe, which looks like the ribcage of a robotic centipede. This leadframe is covered in epoxy, the pins are bent down, and you have an IC. Removing just a tiny bit of epoxy grants access to the leadframe which you can then solder to. Don’t breathe the repair, it’s not pretty, but it does work.
While this technique makes use of a Dremel to break into the chewy nougat center of a vintage chip, and in some ways this could be called decapsulation, it really isn’t. We’ve seen people drop acid to get to the center of a chip and a really hot torch will get to the middle of a ceramic chip, but this technique is just accessing the lead frame of the IC. All ICs have a stamped (or photoetched) metal frame to which the silicone die is bonded. Running a Dremel against some epoxy doesn’t access the silicon, but it does grant access to the signals coming off the chip.
There’s a certain minimum set of stuff the typical Hackaday reader is likely to have within arm’s reach any time he or she is in the shop. Soldering station? Probably. Oscilloscope? Maybe. Multimeter? Quite likely. But there’s one thing so basic, something without which countless numbers of projects would be much more difficult to complete, that a shop without one or a dozen copies is almost unthinkable. It’s the humble 555 timer chip, a tiny chunk of black plastic with eight leads that in concert with just a few extra components can do everything from flashing an LED a couple of times a second to creating music and sound effects.
We’ve taken a look under the hood of the 555 before and featured many, many projects that show off the venerable chip’s multiple personalities quite well. But we haven’t looked at how Everyone’s First Chip came into being, and what inspired its design. Here’s the story of the 555 and how it got that way.
Sixty years ago this month, an unassuming but gifted engineer sitting in a lonely lab at Texas Instruments penned a few lines in his notebook about his ideas for building complete circuits on a single slab of semiconductor. He had no way of knowing if his idea would even work; the idea that it would become one of the key technologies of the 20th century that would rapidly change everything about the world would have seemed like a fantasy to him.
We’ve covered the story of how the integrated circuit came to be, and the ensuing patent battle that would eventually award priority to someone else. But we’ve never taken a close look at the quiet man in the quiet lab who actually thought it up: Jack Kilby.
In 1976, Texas Instruments came out with the TL084, a four JFET op-amp IC each with similar circuitry to Fairchild’s very popular single op-amp 741. But even though the 741 has been covered in detailed, when [Ken Shirriff] focused his microscope on a TL084, he found some very interesting things.
To avoid using acid to get at the die, he instead found a ceramic packaged TL084 and pried off the cover. The first things he saw were four stabilizing capacitors, by far the largest structures on the die and visible to the naked eye.
When he peered into his microscope he next saw butterfly shapes which turned out to be pairs of input JFETs. The wide strips are the gates and the narrower strip surrounded by each gate is the source. The drain is the narrow strip surrounding each gate. Why arrange four JFETs like this? It’s possible to have temperature gradients in the IC, one side being hotter than the other. These gradients can affect the JFET’s characteristics, unbalancing the inputs. Look closely at the way the JFETs are connected and you’ll see that the top-left one is connected to the bottom-right one, and similarly for the other two. This diagonal cross-connecting cancels out any negative effects.
[Ken’s] analysis in his article doesn’t stop there though. Not only does he talk more about these JFETs but he goes over the rest of the die too. It’s well worth the read, as is his write-up about the 741 which we’ve also covered.
A few days ago we brought you news of [Sam Zeloof]’s amazing achievement, of creating the first home-made lithographically produced integrated circuit. It was a modest enough design in a simple pair of differential amplifiers and all we had to go on was a Twitter announcement, but it promised a more complete write-up to follow. We’re pleased to note that the write-up has arrived, and we can have a look at some of the details of just how he managed to produce an IC in his garage. He’s even given it a part number, the Zeloof Z1.
For ease of manufacture he’s opted for a PMOS process, and he is using four masks which he lists as the active/doped area, gate oxide, contact window, and top metal. He takes us through 66 different processes that he performs over the twelve hours of a full production run, with comprehensive descriptions that make for a fascinating run-down of semiconductor manufacture for those of us who will never build a chip of our own but are still interested to learn how it is done. The chip’s oblong dimensions are dictated by the constraints of an off-the-shelf Kyocera ceramic chip carrier, though without a wire bonding machine he’s unable to do any more than test it with probes.
It is now six decades since the first prototypes of practical integrated circuits were produced. We are used to other technological inventions from the 1950s having passed down the food chain to the point at which they no longer require the budget of a huge company or a national government to achieve, but somehow producing an integrated circuit has remained out of reach. It’s the preserve of the Big Boys, move on, there’s nothing to see here.
Happily for us there exists a dedicated band of experimenters keen to break that six-decade dearth of home-made ICs. And now one of them, [Sam Zeloof], has made an announcement on Twitter that he has succeeded in making a dual differential amplifier IC using a fully lithographic process in his lab. We’ve seen [Jeri Ellsworth] create transistors and integrated circuits a few years ago and he is at pains to credit her work, but her interconnects were not created lithographically, instead being created with conductive epoxy.
For now, all we have is a Twitter announcement, a promise of a write-up to come, and full details of the lead-up to this momentous event on [Sam]’s blog. He describes both UV lithography using a converted DLP projector and electron beam lithography using his electron microscope, as well as sputtering to deposit aluminium for on-chip interconnects. We’ve had an eye on his work for a while, though his progress has been impressively quick given that he only started amassing everything in 2016. We look forward to greater things from this particular garage.