It’s a problem that few of us will likely ever face: once you’ve built your first homemade integrated circuit, what do you do next? If you’re [Sam Zeloof], the answer is clear: build better integrated circuits.
At least that’s [Sam]’s plan, which his new reactive-ion etching setup aims to make possible. While his Z1 dual differential amplifier chip was a huge success, the photolithography process he used to create the chip had its limitations. The chemical etching process he used is a bit fussy, and prone to undercutting of the mask if the etchant seeps underneath it. As its name implies, RIE uses a plasma of highly reactive ions to do the etching instead, resulting in finer details and opening the door to using more advanced materials.
[Sam]’s RIE rig looks like a plumber’s stainless steel nightmare, in the middle of which sits a vacuum chamber for the wafer to be etched. After evacuating the air, a small amount of fluorinated gas — either carbon tetrafluoride or the always entertaining sulfur hexafluoride — is added to the chamber. A high-voltage feedthrough provides the RF energy needed to create a plasma, which knocks fluorine ions out of the process gas. The negatively charged and extremely reactive fluorine ions are attracted to the wafer, where they attack and etch away the surfaces that aren’t protected by a photoresist layer.
It all sounds simple enough, but the video below reveals the complexity. There are a lot of details, like correctly measuring vacuum, avoiding electrocution, keeping the vacuum pump oil from exploding, and dealing with toxic waste products. Hats off to [Sam’s dad] for pitching in to safely pipe the exhaust gases through the garage door. This ties with [Huygens Optics]’s latest endeavor for the “coolest things to do with fluorine” award.
[Ken] stepped up, and at first glance, it was obvious that most of the chip is unused, and there appeared to be four copies of the same circuit. After identifying resistors and the different transistor types, [Ken] found differential pairs.
Differential pairs form the heart of most op-amps, and by chaining them together, you can get a strong enough signal to treat it as a logic signal. Based on the design and materials, [Ken] estimates the chip is from the 1970s. Given that it appears to be ECL (Emitter-Coupled Logic), it could just be four comparators. But there are still a few things that don’t add up as two comparators have additional inverted outputs. Searching the part number offered few if any clues, so this will remain somewhat a mystery.
We treat them like black boxes, which they oftentimes are, but what lies beneath the inscrutable packages of electronic components is another world that begs exploration. But the sensitive and fragile silicon guts of these devices can be hard to get to, requiring destructive methods that, in the hands of a novice, more often than not lead to the demise of the good stuff inside.
To help us sort through the process of getting inside components, John McMaster will stop by the Hack Chat. You’ll probably recognize John’s work from Twitter and YouTube, or perhaps from his SiliconPr0n.org website, home to beauty shots of some of the chips he has decapped. John is also big in the reverse engineering community, organizing the Mountain View Reverse Engineering meetup, a group that meets regularly to discuss the secret world of components. Join us as we talk to John about some of the methods and materials used to get a look inside this world.
If development platforms were people, Google would be one of the most prolific serial killers in history. Android Things, Google’s attempt at an OS for IoT devices, will officially start shutting down on January 5, 2021, and the plug will be pulled for good a year later. Android Things, which was basically a stripped-down version of the popular phone operating system, had promise, especially considering that Google was pitching it as a secure alternative in the IoT space, where security is often an afterthought. We haven’t exactly seen a lot of projects using Android Things, so the loss is probably not huge, but the list of projects snuffed by Google and the number of developers and users left high and dry by these changes continues to grow. Continue reading “Hackaday Links: December 20, 2020”→
If you’ve ever handled a chip with a really strange or highly inconvenient pinout and suspected that the reason had something to do with the inner workings, you may be interested to see [electronupdate]’s analysis of why the 4017 Decade Counter IC has such a weirdly nonintuitive pinout. It peeks into an IC design dating from the 1970s to see an example of the kind of design issues that can affect physical layout.
In the case of the 4017, once decapped and the inner workings exposed, things became more clear. Inside the chip are a bunch of flip-flops and NAND gates, laid out in a single layer. Some of the outputs (outputs 5 and 1 for example, physically on pins 1 and 2 respectively) share the same flip-flop.
The original design placed the elements in a way that made the most logical sense for routing and layout, which resulted in nice and tidy inner workings but an apparently illogical pinout. A lot of this is probably feeling familiar to anyone who has designed and routed a single-layer PCB, where being limited to one layer makes it important to get the most connections as directly near one another as possible.
Chip design has of course come a long way since the 70s, but there is forever some level of trade-off to be made between outward tidiness and inner design harmony. The next time you’re looking at a part with an apparently illogical pinout, there’s a fair chance it makes far more sense on the inside.
We get it, press releases are full of hyperbole. Cerebras recently announced they’ve built the largest chip ever. The chip has 400,000 cores and contains 1.2 trillion transistors on a die over 46,000 square mm in area. That’s roughly the same as a square about 8.5 inches on each side. But honestly, the WSE — Wafer Scale Engine — is just most of a wafer not cut up. Typically a wafer will have lots of copies of a device on it and it gets split into pieces.
According to the company, the WSE is 56 times larger than the largest GPU on the market. The chip boasts 18 gigabytes of storage spread around the massive die. The problem isn’t making such a beast — although a normal wafer is allowed to have a certain number of bad spots. The real problems come through things such as interconnections and thermal management.
While most of us are content to buy the chips we need to build our projects, there’s a small group of hackers more interested in making the chips themselves. What it takes the big guys a billion-dollar fab to accomplish, these hobbyists are doing with second-hand equipment, chemicals found in roach killers and rust removers, and a lot of determination to do what no DIYer has done before.
Sam Zeloof is one of this dedicated band, and we’ve been following his progress for years. While he was still in high school, he turned the family garage into a physics lab and turned out his first simple diodes. Later came a MOSFET, and eventually the Z1, a dual-differential amp chip that is the first IC produced by a hobbyist using photolithography.
Sam just completed his first year at Carnegie-Mellon, and he’s agreed to take some precious summer vacation time to host the Hack Chat. Join us as we learn all about the Z1, find out what improvements he’s made to his process, and see what’s next for him both at college and in his own lab.
Click that speech bubble to the right, and you’ll be taken directly to the Hack Chat group on Hackaday.io. You don’t have to wait until Wednesday; join whenever you want and you can see what the community is talking about.